HHashi IP Solutions

HBM · Chiplets · Packaging · TSV · Memory

Semiconductor Prior Art Search Services

Investigate earlier disclosures before you tape out, file or commit.

Semiconductor innovation now spans devices, processes, packaging, memory and interfaces. Hashi IP Solutions runs technology-focused prior art searches across patent and relevant non-patent literature, so semiconductor R&D and IP teams can review earlier disclosures with structured, traceable findings.

Illustration of an advanced semiconductor package with stacked memory, chiplets and through-silicon vias for semiconductor prior art search

Industry challenge

Why Semiconductor Prior Art Is Hard to Find

The same idea can be claimed as a structure, a process or a circuit — and comparable disclosures are spread across patents, papers and standards-related documents.

A

Structure, process and circuit overlap

A single semiconductor invention may be claimed as a device structure, a fabrication method, a circuit or a system. Relevant earlier disclosures can sit in any of these framings, so the search follows each.

B

Dense, evolving terminology

Interposers, bridges, redistribution layers, hybrid bonding and micro-bumps are described in many ways across companies, eras and regions. Searches expand terms, acronyms and classifications deliberately.

C

Heavy non-patent literature

Much semiconductor knowledge is published in conference papers, journals and standards-related documents, not only in patents. These can matter as much as patent publications.

D

Cross-layer inventions

Packaging, thermal, signal-integrity, memory-controller and interface ideas often interact. Comparable solutions may be filed under a neighbouring layer of the stack.

E

Decisions, not just documents

A structured search helps teams find relevant disclosures and inform patentability and product decisions. It does not guarantee patentability, freedom to operate, grant or the avoidance of infringement.

Coverage

Semiconductor Technologies We Search

01

High Bandwidth Memory (HBM)

Stacked DRAM architectures, base and logic dies, memory-stack thermal management, refresh and repair schemes, wide-I/O interfaces and controller–PHY integration.

02

Chiplets and Heterogeneous Integration

Die partitioning, die-to-die interconnects, chiplet interface concepts, known-good-die testing, disaggregated SoC architectures and multi-die system design.

03

Advanced Packaging

2.5D and 3D packaging, silicon and organic interposers, embedded bridges, fan-out wafer-level packaging, redistribution layers, hybrid bonding, warpage control and package-level thermal solutions.

Advanced packaging insight

04

Through-Silicon Vias (TSV)

TSV formation, liners and barriers, fill materials, keep-out zones, stress mitigation, wafer thinning, reveal processes and TSV-based stacking.

05

Memory Technologies

DRAM, NAND and NOR flash, 3D NAND, emerging non-volatile memories, memory cells, sensing and programming schemes, error correction and memory-controller techniques.

06

Interfaces and Interconnects

High-speed serial and parallel interfaces, memory interfaces, SerDes, equalisation, clocking, signal and power integrity, and on-package and off-package interconnects.

07

Logic Devices and Process Technology

Transistor architectures such as FinFET and gate-all-around, lithography-related methods, deposition, etching, metallisation, back-side power delivery and process integration.

08

Power and Analog Semiconductors

Power devices including wide-bandgap materials, power management ICs, data converters, RF front-end circuits and mixed-signal design.

09

AI Accelerators and Compute Architectures

Processing-near-memory, compute-in-memory, accelerator microarchitectures, on-chip networks and memory-hierarchy innovations.

Software prior art search

010

Test, Reliability and Yield

Design-for-test, built-in self-test, wafer and package test, failure analysis, reliability mechanisms and yield-improvement methods.

Sources & terminology

Searching Beyond One Vocabulary

Coverage depends on the agreed scope, source accessibility and publication dates. No search can promise exhaustive discovery.

Sources we may investigate

  • Patent publications and patent-family information
  • Technical disclosures in claims, descriptions, figures and embodiments
  • Conference proceedings, journals and other technical publications
  • Publicly accessible standards-related documents, such as JEDEC or IEEE publications, where relevant and accessible
  • Public datasheets, product literature and other dated disclosures, where appropriate

How we expand the search

  • Structural features (e.g. ‘bridge die’ → embedded interconnect, silicon bridge)
  • Process alternatives (hybrid bonding, thermocompression, micro-bump reflow)
  • Company- and era-specific terminology for equivalent structures
  • Acronyms and synonyms (HBM, TSV, RDL, FOWLP, GAA, PHY)
  • Patent classifications for devices, processes, packaging and circuits

JEDEC & IEEE

Standards-Related Research, Carefully Bounded

Standards as context, not conclusions

Standards-related documents from bodies such as JEDEC and IEEE can describe interface, memory and test concepts with dates attached. They can help identify earlier technical disclosures where they are publicly accessible and in scope.

Access and dating vary

Some standards documents are restricted, paywalled or revised over time. Publication and availability dates are recorded where they can be established, and gaps are noted rather than assumed.

No essentiality findings

A prior art search does not determine whether a patent is essential to a standard, nor does it provide licensing or legal conclusions. Those questions require separate analysis and qualified professional review.

Search objectives

Match the Search to the Decision

Novelty and patentability-oriented searches

Investigate earlier disclosures relevant to the technical features of a proposed semiconductor invention before or during drafting.

Patentability search

Technical prior art investigation

Explore existing approaches to a defined device, process, packaging or interface problem.

R&D and roadmap support

Help engineering teams understand relevant earlier solutions before committing to a new architecture or process direction.

Invalidity-oriented research

Look for earlier disclosures relevant to the claims of an identified patent, within an agreed scope.

Invalidity search

Landscape and trend analysis

When the question is where a technology area is moving rather than what came before one invention, a landscape study fits better.

Patent landscape

Workflow

From Semiconductor Invention to Structured Evidence

  1. 01

    Understand the invention

    Identify the device, process or system level, the technical problem, the proposed solution, key features and the search objective.

  2. 02

    Define the search scope

    Establish concepts, synonyms, classifications, jurisdictions, date constraints and relevant non-patent sources.

  3. 03

    Search patent literature

    Investigate relevant patent publications and available family information with a strategy tailored to the invention.

  4. 04

    Investigate technical literature

    Review appropriate conference, journal, standards-related and product literature where relevant and accessible.

  5. 05

    Analyse and report findings

    Organise the most relevant results, explain technical similarities and differences, and provide traceable references for review.

Deliverables

What Your Team Receives

  • Executive summary of the principal findings
  • Search scope, assumptions and methodology
  • Relevant patent publication numbers and links, where available
  • Publication dates and patent-family details, where available
  • Relevant non-patent and standards-related citations
  • Technical summaries of selected references
  • Mapping of disclosed features against the invention features under review
  • Relevant similarities, differences and limitations
  • Observations and follow-up search recommendations, where appropriate

Who it's for

Built for Semiconductor Innovators and IP Teams

Semiconductor companies and fabless teams

Investigate earlier disclosures before advancing device, circuit or architecture innovations into filings.

Memory developers

Review prior disclosures on DRAM, HBM, NAND, emerging memories and controller techniques.

Packaging and OSAT teams

Explore earlier packaging, interposer, bonding and thermal disclosures.

Foundry and process engineers

Investigate process, materials and integration approaches.

Chip architects and AI hardware teams

Assess chiplet, accelerator and memory-hierarchy concepts against earlier work.

Equipment and materials suppliers

Review disclosures relevant to tools, materials and process steps you supply.

Corporate patent teams and IP law firms

Obtain structured technical findings to inform further professional review.

Why Hashi IP

A Technology-First Approach

Technology-first scoping

Scope starts from the actual device, process or system problem and the invention's features.

Cross-layer perspective

Searches consider device, process, packaging, circuit and system framings of the same idea.

Patent and technical literature

Patent publications and appropriate non-patent sources are considered within the agreed scope.

Structured, traceable reporting

Findings are organised so engineering and IP stakeholders can review them quickly.

Connected IP intelligence

Findings can lead into patentability, invalidity, landscape or analytics work where useful.

Start a search

Developing a New Semiconductor Technology? Start With the Earlier Disclosures.

Commission a focused prior art search for your HBM, chiplet, packaging, TSV, memory or interface invention. Findings inform — and do not replace — review by qualified patent professionals.

Please don't share confidential invention details when booking. A short, non-confidential summary is enough to scope the work. See our privacy policy.

FAQ

Questions From Semiconductor R&D and IP Teams

What is a semiconductor prior art search?

A structured investigation of patent and relevant non-patent literature for earlier disclosures related to the technical features of a semiconductor invention, such as a device structure, process, package or interface.

Can you search HBM and stacked-memory inventions?

Yes. Searches can cover stacked DRAM, base dies, TSV-based stacking, thermal management, repair schemes and memory interfaces, using expanded terminology and classifications.

Do you cover chiplets and advanced packaging?

Yes — including die-to-die interconnects, interposers, embedded bridges, fan-out packaging, redistribution layers and hybrid bonding, framed as structures, processes or systems as appropriate.

How are TSV-related inventions searched?

The invention is broken into formation, fill, stress, thinning and stacking aspects, each searched with technical synonyms and classifications across patent and technical literature.

Do searches include JEDEC or IEEE documents?

They can, where documents are publicly accessible and in scope. Some standards documents are restricted or revised over time, so availability and dates are recorded where they can be established.

Does a prior art search determine standard essentiality?

No. Essentiality and licensing questions require separate analysis and qualified professional review. A prior art search identifies earlier disclosures only.

Why does non-patent literature matter in semiconductors?

Many semiconductor concepts first appear in conference papers, journals and technical documents. Excluding them can leave relevant earlier disclosures unexamined.

Can a search cover both process and device claims?

Yes. Because the same idea may be claimed as a structure, a method or a circuit, the search considers each framing relevant to the invention.

Is a prior art search the same as a freedom-to-operate search?

No. A prior art search looks at earlier disclosures. A freedom-to-operate search examines in-force claims a product might fall within, and any infringement opinion remains with qualified patent counsel.

Can a search guarantee that nothing relevant exists?

No search can promise exhaustive discovery. Results depend on the agreed scope, source accessibility, publication dates and terminology used in earlier documents.

What should we provide to scope a search?

A short, non-confidential outline is enough to start: the technology area, the problem addressed, the general approach, target jurisdictions and the decision the search should support. Detailed disclosures follow once confidentiality terms are in place.

When should a semiconductor team consider a prior art search?

Typically before drafting an application, before committing to a new architecture or process direction, or when assessing an identified patent. Timing and scope depend on the invention and the objective.