ASML Targets Larger High-NA EUV Chips for Next-Generation Data-Center Silicon

ASML announced plans to work with major chipmakers on adapting its advanced High-NA EUV technology to enable manufacturing of larger data-center chips.

This points to a deeper semiconductor IP opportunity around lithography, advanced process technology, mask architecture, wafer processing, chip scaling, advanced packaging, large-die architectures and AI accelerator manufacturing. As AI chips grow more complex, IP value spreads across the whole stack: process technology, manufacturing, chip architecture, packaging, interconnect and product. Patent analysis should therefore examine the interconnected technology stack rather than individual components.